TSLO ICS 2024

Tile Size and Loop Order Selection using Machine Learning for Multi-/Many-Core Architectures

Posted by Treaseven on December 25, 2024

Motivation

  • Heuristic-based loop order selection can lead to lower performance
  • Best-performing loop order changes across problem sizes
  • Best-performing loop order changes across tile sizes
  • Both tile size and loop order together influence the performance
  • Best-performing tile size changes across problem sizes
  • Best-performing tile size changes across prefetch configurations

Tile size and Loop order selection problem

Hierarchical Classification

  • A Tuned Hierarchical Classifier
    (1) loops that are parallel in the i/j-dimension (2) tile size to be one among the group

  • A Systematica Approach for Classifier Design

Results and Discussions